This application is related to Japanese application No. HEI 10(1998)-157107, filed on Jun. 5, 1998, whose priority is claimed under 35 USC xc2xa7119, the disclosure of which is incorporated by reference in its entirety.
1. Field of the Invention
The present invention relates to a method for driving gas electric discharge devices typified by PDPs (plasma display panels) and PALC (plasma addressed liquid crystal) display panels.
PDPs have been becoming widespread as large-screen display devices for television since color display became operational with the PDPs. The larger screen a PDP has, the more difficult it is to establish a uniform structure in all cells on the screen, and therefore, the PDP is required to be driven by a driving method which has a large voltage margin of voltage to allow for variations in discharge characteristics among the cells.
2. Description of Related Art
Three-electrode AC PDPs of surface-discharge structure are commercialized as color display devices. In such PDPs, a pair of main electrodes (a first electrode and a second electrode) for sustaining light emission is disposed on every line (row) of a matrix for display and an address electrode (a third electrode) for addressing a cell is disposed on every column of the matrix. In addressing, one of the pair of main electrodes (e.g., the second electrode) is used for selecting a line. In the surface-discharge structure, fluorescent layers for color display are formed on a substrate opposed to a substrate on which the pairs of main electrodes are disposed. Thereby deterioration of the fluorescent layers by ion impact at discharges can be reduced and thus the life of the PDP can be extended. PDPs of xe2x80x9creflection typexe2x80x9d which have the fluorescent layers on their rear substrates are superior in luminous efficiency to those of xe2x80x9ctransmission typexe2x80x9d which have the fluorescent layers on their front substrates.
A memory function of a dielectric layer covering the main electrodes is utilized for display. More particularly, addressing is performed by line-by-line scanning for preparing a charged state according to the content of display, and then a sustain voltage Vs of alternating polarity is applied to the main electrode pair of each line for light emission. The sustain voltage Vs satisfies the following formula (I):
Vfxe2x88x92Vw less than Vs less than Vfxe2x80x83xe2x80x83Formula (I),
wherein Vf is a firing voltage and Vw is a wall voltage.
When the sustain voltage Vs is applied, a cell voltage (the sum of the wall voltage and the applied voltage, also referred to as an effective voltage Veff) exceeds the firing voltage only in cells where wall charge exists, so that a surface discharge is generated in the cells along the face of the substrate. If the cycle of applying the sustain voltage Vs is shortened, it is possible to obtain an illumination state which appears continuous.
The luminance of display depends on the number of discharges per unit time. Accordingly, halftones are reproduced by setting the number of discharges in one field for every cell in accordance with levels of gradation to be produced. Color display is one sort of gradation display, and a displayed color is determined by combination of luminances of the three primary colors. In the present specification, the xe2x80x9cfieldxe2x80x9d means a unit image for time-sequential image display. That is, the field means a field of a frame displayed by interlaced scanning in the case of television and a frame itself in the case of non-interlaced scanning (which is regarded as a one-to-one interlaced scanning) typified by computer output.
In order to produce levels of gradation by the PDP, the field is time-sequentially divided into a plurality of sub-fields. The luminance (i.e., the number of discharges) in each sub-field has a weight. The total number of discharges in the field is determined by combining illumination and non-illumination on a sub-field basis. If the application cycle (driving frequency) of the sustain voltage Vs is constant, the sustain voltage Vs is applied for different time periods for different luminance weights. Basically, the sub-fields are assigned so-called xe2x80x9cbinary weightsxe2x80x9d represented by 2q (q=0, 1, 2, 3, . . . ). For example, if the number K of sub-fields in one field is 8, 256 (28) levels of gradation from xe2x80x9c0xe2x80x9d to xe2x80x9c255xe2x80x9d can be produced. The binary weights are free of redundancy and suitable for multi-gradation display. In some cases, however, different sub-fields are purposely assigned the same eight for preventing pseudo-contour which may be involved with moving pictures or the like.
Each sub-field is allotted an address period and an illumination sustaining period (hereafter referred to as a sustain period) as well as an address preparation period for uniforming charged states of all cells. For it is difficult to control a discharge for addressing if cells retaining wall charge for sustaining illumination co-exist with cells not retaining the wall charge.
Conventionally, for the address preparation, a voltage exceeding the firing voltage is applied to all cells to generate a strong discharge therein, thereby to render the entire screen into a substantially uncharged state. The strong discharge produces an excessive amount of wall charge in all cells. Then, the application of voltage is stopped so that an self-erase discharge is generated by the wall charge and then the wall charge disappears. In the address period subsequent to the address preparation period, addressing is performed to generate an address discharge only in cells to be illuminated and thereby to produce a new wall charge therein.
One problem of the conventional driving method is that, since the wall charge is erased in the address preparation, the voltage applied in the addressing must be set in consideration of variations in the firing voltage Vf of the cells due to subtle differences in the structure of the cells. As a result, a voltage margin which allows proper addressing is reduced by the range of the variations in the firing voltage Vf.
Another problem is an increase in the luminance of background. That is, because the strong discharge is generated in the address preparation period not only in cells to illuminate in the next sustain period but also in cells not to illuminate in the next sustain period, the background, which occupies the greater part of the screen, looks bright and thus contrast declines.
Further, since the polarity of the voltage applied in the address preparation period determines the polarity of the sustain voltage Vs applied last in the sustain period, the number of discharges in the sustain period (i.e., the number of applied sustain voltage pulses) is required to be either odd or even through all the sub-fields. For this requirement, the number of discharges in each sub-field must be set at least on a two-time basis, and thus delicate adjustment of luminance is impossible. It is noted that, if the polarity of the sustain voltage Vs in some sub-fields is set different from that in other sub-fields, the voltage for generating the self-erase discharge must be set impractically high.
In view of the above described circumstances, an object of the present invention is to solve the problem of the reduction in the voltage margin due to the variations in the firing voltage Vf for improving the reliability of driving. Another object is to reduce the luminance of the background for improving the contrast. Still another object is to relieve limitations on the polarity of applied voltage for increasing flexibility of drive sequences.
The present invention provides a method for driving a gas electric discharge device having a first electrode and a second electrode for a gas electric discharge which device is constructed such that a wall voltage is capable of being produced between the first and the second electrode, the method comprising applying a voltage monotonously rising from a first set value to a second set value, between the first and the second electrode, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.